Arm Generic Interrupt Controller | Community

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New online training course - Arm GICv3/v4 Essentials

Arm announces a new online training topic, Arm GICv3/v4 Essential. The course brings the subject of Arm’s Generic Interrupt Controller (GIC) architecture specification to life.

2 years ago by Joel Eaton

Changing Exception Level and Security State with an Armv8-A Fixed Virtual P

In this blog we will discuss the architectural features of Exception level and Security state in more detail. You may find it easier to download the code

3 years ago by tmeduthie

Retargeting and Enabling Exceptions with an ELF Image

Retargeting semihosting procedures and enabling hardware interrupt based functionality to an embedded system running in an emulator

3 years ago by tmeduthie

PC meets Arm: Integrating PCIExpress into the Arm Server Architecture

There are some significant challenges assembling server SoCs for the infrastructure market with the latest PCIExpress gen4 capabilities, this blog provides a brief overview of the challenges which will be covered in more detail at the Arm Techcon…

4 years ago by Nick

Community Forums

Answered	Forum FAQs ARM Community	1441 views	0 replies	Started 1 years ago by Annie	Answer this
Answered	DIC/IDC bit in CTR	338 views	6 replies	Latest yesterday by a.surati	Answer this
Answered	Is the bare-metal boot code for A53 also usable for A35?	73 views	1 replies	Latest yesterday by 42Bastian Schick	Answer this
Answered	ICPR usage in Arm Cortex m4 Cortex-M4	143 views	2 replies	Latest yesterday by Yorker Hazan	Answer this
Suggested answer	How does Realm VM deal with interrupts?	134 views	1 replies	Latest 4 days ago by Joseph69	Answer this
Suggested answer	AXI4 Narrow and possibly unaligned READ	122 views	1 replies	Latest 4 days ago by af_23	Answer this

Answered	Forum FAQs Started 1 years ago by Annie	0 replies 1441 views
Answered	DIC/IDC bit in CTR Latest yesterday by a.surati	6 replies 338 views
Answered	Is the bare-metal boot code for A53 also usable for A35? Latest yesterday by 42Bastian Schick	1 replies 73 views
Answered	ICPR usage in Arm Cortex m4 Latest yesterday by Yorker Hazan	2 replies 143 views
Suggested answer	How does Realm VM deal with interrupts? Latest 4 days ago by Joseph69	1 replies 134 views
Suggested answer	AXI4 Narrow and possibly unaligned READ Latest 4 days ago by af_23	1 replies 122 views