New Research Enablement Kit: SoC Design and Prototyping

Arm Research Enablement are pleased to announce the release of our second Research Enablement Kit: SoC Design and Prototyping.

Arm Cortex-M CPUs are designed to meet the needs of tomorrow’s smart and connected embedded applications and are part of the most widely adopted embedded ecosystem. The Cortex-M0 is the smallest and most-efficient 32-bit Arm CPU, which allows the design of extremely small, low-cost System-on-Chips (SoCs). A SoC is an integrated circuit that packages most of the necessary computing components into a single chip. SoC design is mainly an integration process where designers put a set of Intellectual Property (IP) cores together using standard buses.

Arm DesignStart Eval provides free-of-charge access to synthesizable CPU RTL and the full subsystem RTL. The DesignStart CPUs (currently Cortex-M0 and -M3) are integrated into a reference SoC to allow quick and easy prototyping and evaluation of an Arm-based solution on an FPGA. The reference SoC includes several essential peripherals interconnected using standard AMBA on-chip buses, which ease the integration and test of custom IPs. High-performance IPs are expected to be connected to the Advanced High-Performance Bus (AHB) bus, whereas IPs that require low bandwidth data exchanges are expected to be connected to the Advanced Peripheral Bus (APB) bus.

This Research Enablement Kit will help you design and prototype a SoC based on the Arm Cortex-M0 CPU using the on-chip AMBA buses and the Arm DesignStart reference design.

Download Research Enablement Kit

Why use this Research Enablement Kit?

Arm DesignStart is the fastest route to designing and prototyping custom SoCs. This Research Enablement Kit demonstrates the SoC design flow and shows how to create an Arm-powered SoC using your custom IPs to validate your research effort.

More specifically, it shows how to integrate typical Floating-Point Unit (FPU) and Advanced Encryption Standard (AES) IP cores into a Cortex-M0-based SoC provided by Arm DesignStart.

You will also have access to the DesignStart Community, which facilitates discussions and provides access to technical information, whitepapers, videos, and FAQs to help you design with Arm IP.

Who can benefit from this Research Enablement Kit?

The SoC Design and Prototyping kit is suitable for academics and researchers who are looking to integrate their custom IP core into an Arm-based SoC, and will also enable them to use the exceptionally small and low power Cortex-M0 in different research areas; anything from SoC design to IoT, parallel and heterogeneous computing.

To use the kit, you will need beginner knowledge of C programming language, beginner to intermediate knowledge of SoC prototyping and working knowledge of Verilog.

What is included in this Research Enablement Kit?

The SoC Design and Prototyping Research Enablement Kit includes the following components:

• Supplementary Code: We have provided hardware (e.g. bus wrappers) and software (drivers and applications) components for both FPU and AES IP cores to be integrated into the SoC provided by DesignStart
• Documentation: In the corresponding whitepaper, we start by an introduction to SoC design and FPGA prototyping, followed by an overview of Arm DesignStart. We then show how to integrate the two IP cores, FPU and AES IP cores into the Cortex-M0-based SoC and peripherals provided by Arm DesignStart. We also compare the performance results of the IPs integrated in AMBA AHB and APB buses with those of the software implementations of the algorithms running on the Cortex-M0 processor itself.

About Arm Research Enablement Kits

Our Research Enablement Kits are easy-to-access/open-source software packages, models, hardware prototypes, and services to universities worldwide. They include high-quality research materials and packages as well as detailed documentation or whitepapers.

Find out more about Arm Research Enablement