Connect the CryptoCell-312

The AHB5 bus matrix provides a slave and master interface for the CryptoCell-312 to connect to. The CryptoCell-312 connects as a slave to the AHB5 bus matrix through an AHB4 interface. It connects as a master to the AHB5 bus matrix through an AHB5 interface. An AHB5 to APB4 asynchronous bridge is needed between the AHB4 interface and the AHB5 bus matrix.

You must also implement One Time Programmable (OTP) memory and a persistent state storage block for the CryptoCell. The CryptoCell stores key state information in the persistent state storage block. If a cold reset occurs, the CryptoCell repopulates persistent values from the OTP memory. Implement the OTP memory using on die e-fuses or using private, protected eFlash locations.

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