The SSE-123 contains the following timers:
- Two system timers. You can map, by software, one timer for Secure mode and one timer for Non-secure mode.
- Two watchdog timers. You can map, by software, one watchdog for Secure mode and one watchdog for Non-secure mode.
- A system counter. This unit provides the timestamp that is used by all watchdog timer and system timers.
The timestamp-based timers are 64-bit and were developed for the SSE-123 and future IoT subsystems. The timers from the CMSDK, which were covered in Add the timers as peripherals, are 32-bit and can also be added if necessary. The SSE-123 system and watchdog timers function in the same way as the watchdog that is described in Add the timers as peripherals. The only exception is that these timers all need a shared reference timestamp input from which to derive their time. The system counter is part of the SSE-123 Integration and provides a 64-bit timestamp value that compatible components across the SoC can share.
Note: More information on the SSE-123 counters is available in Appendix B of the Arm SSE-123 Example Subsystem Technical Reference Manual.