Clock and power management in an SoC

Depending on the complexity of a system, a system can have multiple clock and power domains.

A clock domain is defined as a group of IP components which run from a common clock. If all components are in a state of quiescence, the clock can be removed from the components. This process is also known as clock gating. Clock gating is one technique that you can use to reduce dynamic power consumption.

A power domain is defined as a group of components which can power up or down together. If all components in a power domain are in a state of quiescence, then they can be powered down together to save power.

In an SoC, clock domain and power domain management involve building an infrastructure to handle communication and decision making in these areas. The PCK-600 contains a set of components that you can use to build this infrastructure.

Note: Information about specific clock and power domains for this SoC is beyond the scope of this guide. However, we anticipate that this SoC contains more than one clock domain and more than one power domain. Components from the PCK-600 help to create the control infrastructure for these domains. How these components can link together is explained in a non-specific way in Low-Power Interfaces, PCK-600 components and Usage example.

Note: In Low-Power Interfaces, PCK-600 components and Usage example, the term device is synonymous with IP. 

Low Power Interfaces

Low-Power Interfaces (LPIs) facilitate communication between controller and devices. Specifically, this communication enables a safe transition between different power states. There are two types of LPI:

  • Q-Channel LPI
  • P-Channel LPI

A Q-Channel interface can be used to control transition between two main states, which are run and stop. A P-Channel can be used to control transition between multiple states. For example, a device could have the following power states:

  • On mode. The device is fully operational.
  • Retention mode: The device logic is turned off. However, the RAM blocks are in retention, which preserves state.
  • Off mode: The device is fully shut down, and the RAM retains no state.

Q-Channels can be used to control quiescence of clock domains and power domains. P-Channels are typically used for controlling power domains.

Note: For clarity, LPIs are not shown in any of the previous figures or mentioned in the interface tables. However, you can assume the IP is managed in suitable clock and power domains for the SoC using LPIs and, potentially, PCK-600 components.

PCK-600 components
Low-Power Distributor Q-Channel
The Low-Power Distributor Q-Channel (LPD-Q) allows a Q-Channel controller to control up to 32 Q-Channel interfaces present on the components of a system.
Controllers, like CLK-CTRL, distribute signals to multiple components in a domain using the LDP-Q. For example, a CLK-CTRL can broadcast a request to clock gate all devices in a clock domain. It is important to remember that communication is two way. The CLK-CTRL also receives information about the level of activity in the components so it can decide whether to gate the domain.
When communicating with components, requests can be broadcast in parallel or passed sequentially to each device Q-Channel. You can control how the broadcast is made through configuration parameters.
Low-Power Distributor P-Channel
The Low-Power Distributor P-Channel (LPD-P) allows a P-Channel controller to control up to eight P-Channel interfaces that are present on the components of a system.
Controllers, like the Power Policy Unit (PPU), distribute signals to multiple components in a domain using the LDP-P. For example, a PPU can broadcast a request to transition between power states to all components in a power domain. It is important to remember that communication is two-way. The PPU also receives information about the level of activity in the components so it can decide whether to broadcast a transition state request.
When communicating with components, requests can be broadcast in parallel or passed sequentially to each device P-Channel. You can control how the broadcast is made through configuration parameters.
Low-Power Combiner Q-Channel
The Low-Power Combiner Q-Channel (LPC-Q) allows two or more Q-Channel controllers to control up to 32 Q-Channel interfaces that are present on the components of a system.
The LPC-Q works in a similar way to the LPD-Q, but allows more than one controller to communicate with the devices.
P-Channel to Q-Channel Converter
The P-Channel to Q-Channel Converter (P2Q) converts a single P-Channel into a single Q-Channel.
Power Policy Unit
The Power Policy Unit (PPU) monitors activity information from connected components. Based on this information and a software-programmed power domain policy, the PPU decides whether to place the components of a domain in another power state.
The PPU, using a P-Channel, communicates with a Power Control State Machine (PCSM), which executes power state changes under PPU direction. This process is done while the PPU directly communicates with the components. This means that the PCSM is activated when the devices have transitioned to the correct power state. The scheme is:
  • Software programs a policy into the PPU.
  • The PPU observes device activity on a device interface. The interface can be either a Q-Channel or P-Channel.
  • The PPU uses the device interface to transition device LPIs to the proper state as defined in the policy.
  • The PPU controls the PCSM to activate the physical power control hooks, for example to power down the device.
The PCSM is a technology-dependent state machine that you are responsible for implementing. The PCSM handles the sequencing of power switch chains and retention controls. If necessary, you can implement RAM and registers dedicated to the PCSM.
If a CLK-CTRL is present on the system, the PPU also communicates with it. This connection enables potential clock gating of the PPU itself.
The PPU allows software control of its operations and provides an APB interface for this. For example, software can control the policy that the PPU is running. In System diagram, the PPU is shown as a peripheral.
Clock Controller
The Clock Controller (CLK-CTRL) monitors activity information from components that are connected through a Q-Channel interface. Based on this information, the PPU decides whether to gate the components of a domain.
Usage example

The following figure shows an example of how you could use four of the PCK-600 components:

The components connect with the devices and each other to control a clock domain and a power domain in an SoC. In this example, the clock domain has two components in it. The power domain contains four components. Component C and Component D are also in a clock domain, but this domain is not shown in the figure.

Note: In Arm-designed systems, the hierarchy typically includes power domains that contain one or more clock domains.

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