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AArch32 Generic Timer register summary

The following table shows the AArch32 Generic Timer registers.

Table 9-3 AArch32 Generic Timer registers

Name Reset Width Description
CNTFRQ UNK 32-bit

Counter-timer Frequency register

CNTPCT UNK 64-bit Counter-timer Physical Count register
CNTKCTL -a 32-bit Counter-timer Kernel Control register
CNTP_TVAL UNK 32-bit Counter-timer Physical Timer TimerValue register
CNTP_CTL

-b

32-bit

Counter-timer Physical Timer Control register

CNTV_TVAL UNK 32-bit

Counter-timer Virtual Timer TimerValue register

CNTV_CTL -b 32-bit

Counter-timer Virtual Timer Control register

CNTVCT UNK 64-bit

Counter-timer Virtual Count register

CNTP_CVAL UNK 64-bit Counter-timer Physical Timer CompareValue register
CNTV_CVAL UNK 64-bit Counter-timer Virtual Timer CompareValue register
CNTVOFF UNK 64-bit

Counter-timer Virtual Offset register

CNTHCTL

-c

32-bit Counter-timer Hyp Control register
CNTHP_TVAL UNK 32-bit

Counter-timer Hyp Physical Timer TimerValue register

CNTHP_CTL -b 32-bit Counter-timer Hyp Physical Timer Control register
CNTHP_CVAL UNK 64-bit

Counter-timer Hyp Physical CompareValue register

See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile for information about these registers.

a

The reset value for bits[9:8, 2:0] is 0b00000.

b 

The reset value for bit[0] and bit[1] is 0.

c

The reset value for bit[2] is 0 and for bits[1:0] is 0b11.

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