ADR (PC-relative)
Generate a PC-relative address in the destination register, for a label in the current area.
Syntax
ADR
{
}{cond
.W
}
,Rd
label
where:
cond
is an optional condition code.
.W
is an optional instruction width specifier.
Rd
is the destination register to load.
label
is a PC-relative expression.
label
must be within a limited distance of the current instruction.
Usage
ADR
produces position-independent
code, because the assembler generates an instruction that adds or
subtracts a value to the PC.
Use the ADRL
pseudo-instruction
to assemble a wider range of effective addresses.
label
must evaluate to
an address in the same assembler area as the ADR
instruction.
If you use ADR
to generate a target for
a BX
or BLX
instruction,
it is your responsibility to set the T32 bit (bit 0) of the address if the target contains
T32 instructions.
Offset range and architectures
The assembler calculates the offset from the PC for you. The assembler
generates an error if
is out of range.label
The following table shows the possible offsets between the label and the current instruction:
Table 13-2 PC-relative offsets
Instruction | Offset range |
---|---|
ADR
|
See Syntax of Operand2 as a constant. |
ADR , 32-bit
encoding |
+/– 4095 |
T32 ADR , 16-bit
encoding a |
0-1020 b |
ADR in T32
You can use the .W
width specifier to
force ADR
to generate a 32-bit instruction in T32 code.
ADR
with .W
always
generates a 32-bit instruction, even if the address can be generated in a 16-bit
instruction.
For forward references, ADR
without
.W
always generates a 16-bit instruction in T32 code,
even if that results in failure for an address that could be generated in a 32-bit T32
ADD
instruction.
Restrictions
In T32 code, R
cannot be d
PC
or SP
.
In A32 code, R
can be d
PC
or SP
but use of SP
is
deprecated.
Related reference
Rd must be in the range R0-R7.
Must be a multiple of 4.