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LDRB (immediate)

Load Register Byte (immediate).

Syntax

LDRB Wt, [Xn|SP], #simm ; Post-index general registers

LDRB Wt, [Xn|SP, #simm]! ; Pre-index general registers

LDRB Wt, [Xn|SP{, #pimm}] ; Unsigned offset general registers

Where:

simm

The value depends on the instruction variant:

Post-index general registers

Is the signed immediate byte offset, in the range -256 to 255.

Pre-index general registers

Is the signed immediate byte offset, in the range -256 to 255.

pimm

Is the optional positive immediate byte offset, in the range 0 to 4095, defaulting to 0.

Wt

Is the 32-bit name of the general-purpose register to be transferred.

Xn|SP

Is the 64-bit name of the general-purpose base register or stack pointer.

Usage

Load Register Byte (immediate) calculates an address from a base register value and an immediate offset, loads a byte from memory, zero-extends it, and writes it to a register. For information about memory accesses, see Load/Store addressing modes in the ARMv8-A Architecture Reference Manual.

Note

For information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors in the ARMv8-A Architecture Reference Manual, and particularly LDRH (immediate) in the ARMv8-A Architecture Reference Manual.
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