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ANDS (shifted register)

Bitwise AND (shifted register), setting flags.

This instruction is used by the alias TST (shifted register).

Syntax

ANDS Wd, Wn, Wm{, shift #amount} ; 32-bit general registers

ANDS Xd, Xn, Xm{, shift #amount} ; 64-bit general registers

Where:

Wd

Is the 32-bit name of the general-purpose destination register.

Wn

Is the 32-bit name of the first general-purpose source register.

Wm

Is the 32-bit name of the second general-purpose source register.

amount

The value depends on the instruction variant:

32-bit general registers

The shift amount, in the range 0 to 31, defaulting to 0.

64-bit general registers

The shift amount, in the range 0 to 63, defaulting to 0.

Xd

Is the 64-bit name of the general-purpose destination register.

Xn

Is the 64-bit name of the first general-purpose source register.

Xm

Is the 64-bit name of the second general-purpose source register.

shift

Is the optional shift to be applied to the final source, defaulting to LSL, and can be one of LSL, LSR, ASR, or ROR.

Usage

Bitwise AND (shifted register), setting flags, performs a bitwise AND of a register value and an optionally-shifted register value, and writes the result to the destination register. It updates the condition flags based on the result.

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