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DC

Data Cache operation.

This instruction is an alias of SYS.

Syntax

DC dc_op, Xt

Equivalent to SYS #op1, C7, Cm, #op2, Xt

Where:

dc_op

Is a DC operation name, as listed for the DC system operation group, and can be one of IVAC, ISW, CSW, CISW, ZVA, CVAC, CVAU or CIVAC.

op1

Is a 3-bit unsigned immediate, in the range 0 to 7.

Cm
Is a name Cm, with m in the range 0 to 15.
op2

Is a 3-bit unsigned immediate, in the range 0 to 7.

Xt

Is the 64-bit name of the general-purpose source register.

Usage

Data Cache operation. For more information, see A64 system instructions for cache maintenance in the ARMv8-A Architecture Reference Manual.

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