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VDIV
Floating-point divide.
Syntax
VDIV{cond.F32
{SdSnSm
VDIV{cond.F64
{DdDnDm
where:
condis an optional condition code.
Sd,Sn,Smare the single-precision registers for the result and operands.
Dd,Dn,Dmare the double-precision registers for the result and operands.
Operation
The VDIV instruction divides the
value in the first operand register by the value in the second operand
register, and places the result in the destination register.
Floating-point exceptions
VDIV operations can produce Division
by Zero, Invalid Operation, Overflow, Underflow, or Inexact exceptions.