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A32 and T32 instruction summary

An overview of the instructions available in the A32 and T32 instruction sets.

Note

This topic includes descriptions of [BETA] features.

Table 13-1 Summary of instructions

MnemonicBrief description
ADC, ADDAdd with Carry, Add
ADRLoad program or register-relative address (shortrange)
ADRL pseudo-instructionLoad program or register-relative address (mediumrange)
ANDLogical AND
ASRArithmetic Shift Right
BBranch
BFC, BFIBit Field Clear and Insert
BICBit Clear
BKPTSoftware breakpoint
BLBranch with Link
BLX, BLXNS Branch with Link, change instruction set, Branch with Link and Exchange (Non-secure)
BX, BXNS Branch, change instruction set, Branch and Exchange (Non-secure)
CBZ, CBNZCompare and Branch if {Non}Zero
CDP Coprocessor Data Processing operation
CDP2 Coprocessor Data Processing operation
CLREX Clear Exclusive
CLZCount leading zeros
CMN, CMPCompare Negative, Compare
CPSChange Processor State
CPY pseudo-instructionCopy
DBGDebug
DCPS1Debug switch to exception level 1
DCPS2Debug switch to exception level 2
DCPS3Debug switch to exception level 3
DMB, DSBData Memory Barrier, Data Synchronization Barrier
DSB Data Synchronization Barrier
EORExclusive OR
ERETException Return
HLTHalting breakpoint
HVCHypervisor Call
ISBInstruction Synchronization Barrier
ITIf-Then
LDAEX, LDAEXB, LDAEXH, LDAEXD Load-Acquire Register Exclusive Word, Byte, Halfword, Doubleword
LDC, LDC2Load Coprocessor
LDMLoad Multiple registers
LDRLoad Register with word
LDR pseudo-instructionLoad Register pseudo-instruction
LDA, LDAB, LDAHLoad-Acquire Register Word, Byte, Halfword
LDRBLoad Register with Byte
LDRBTLoad Register with Byte, user mode
LDRDLoad Registers with two words
LDREX, LDREXB, LDREXH, LDREXD Load Register Exclusive Word, Byte, Halfword, Doubleword
LDRHLoad Register with Halfword
LDRHTLoad Register with Halfword, user mode
LDRSBLoad Register with Signed Byte
LDRSBTLoad Register with Signed Byte, user mode
LDRSHLoad Register with Signed Halfword
LDRSHTLoad Register with Signed Halfword, user mode
LDRTLoad Register with word, user mode
LSL, LSRLogical Shift Left, Logical Shift Right
MCRMove from Register to Coprocessor
MCRRMove from Registers to Coprocessor
MLAMultiply Accumulate
MLSMultiply and Subtract
MOVMove
MOVTMove Top
MOV32 pseudo-instructionMove 32-bit immediate to register
MRCMove from Coprocessor to Register
MRRCMove from Coprocessor to Registers
MRSMove from PSR to Register
MRS pseudo-instructionMove from system Coprocessor to Register
MSRMove from Register to PSR
MSR pseudo-instructionMove from Register to system Coprocessor
MULMultiply
MVNMove Not
NEG pseudo-instructionNegate
NOPNo Operation
ORNLogical OR NOT
ORRLogical OR
PKHBT, PKHTBPack Halfwords
PLDPreload Data
PLDWPreload Data with intent to Write
PLIPreload Instruction
PUSH, POPPUSH registers to stack, POP registers fromstack
QADD, QDADD, QDSUB, QSUBSaturating arithmetic
QADD8, QADD16, QASX, QSUB8, QSUB16, QSAXParallel signed saturating arithmetic
RBITReverse Bits
REV, REV16, REVSHReverse byte order
RFEReturn From Exception
RORRotate Right Register
RRXRotate Right with Extend
RSBReverse Subtract
RSCReverse Subtract with Carry
SADD8, SADD16, SASXParallel Signed arithmetic
SBCSubtract with Carry
SBFX, UBFXSigned, Unsigned Bit Field eXtract
SDIVSigned Divide
SELSelect bytes according to APSR GE flags
SETENDSet Endianness for memory accesses
SEVSet Event
SEVL Set Event Locally
SG Secure Gateway
SHADD8, SHADD16, SHASX, SHSUB8, SHSUB16, SHSAXParallel Signed Halving arithmetic
SMCSecure Monitor Call
SMLAxySigned Multiply with Accumulate (32 <= 16x 16 + 32)
SMLADDual Signed Multiply Accumulate
 (32 <= 32 + 16 x 16 + 16 x 16)
SMLALSigned Multiply Accumulate (64 <= 64 + 32x 32)
SMLALxySigned Multiply Accumulate (64 <= 64 + 16x 16)
SMLALDDual Signed Multiply AccumulateLong
 (64 <= 64 + 16 x 16 + 16 x 16)
SMLAWySigned Multiply with Accumulate (32 <= 32x 16 + 32)
SMLSDDual Signed Multiply SubtractAccumulate
 (32 <= 32 + 16 x 16 – 16 x 16)
SMLSLDDual Signed Multiply SubtractAccumulate Long
 (64 <= 64 + 16 x 16 – 16 x 16)
SMMLASigned top word Multiply with Accumulate (32<= TopWord(32 x 32 + 32))
SMMLSSigned top word Multiply with Subtract (32<= TopWord(32 - 32 x 32))
SMMULSigned top word Multiply (32 <= TopWord(32x 32))
SMUAD, SMUSDDual Signed Multiply, and Add or Subtract products
SMULxySigned Multiply (32 <= 16 x 16)
SMULLSigned Multiply (64 <= 32 x 32)
SMULWySigned Multiply (32 <= 32 x 16)
SRSStore Return State
SSATSigned Saturate
SSAT16Signed Saturate, parallel halfwords
SSUB8, SSUB16, SSAXParallel Signed arithmetic
STCStore Coprocessor
STMStore Multiple registers
STRStore Register with word
STRBStore Register with Byte
STRBTStore Register with Byte, user mode
STRDStore Registers with two words
STREX, STREXB, STREXH,STREXD Store Register Exclusive Word, Byte, Halfword, Doubleword
STRHStore Register with Halfword
STRHTStore Register with Halfword, user mode
STL, STLB, STLHStore-Release Word, Byte, Halfword
STLEX, STLEXB, STLEXH, STLEXDStore-Release Exclusive Word, Byte, Halfword, Doubleword
STRTStore Register with word, user mode
SUBSubtract
SUBS pc, lrException return, no stack
SVC (formerly SWI)Supervisor Call
SXTAB, SXTAB16, SXTAHSigned extend, with Addition
SXTB, SXTHSigned extend
SXTB16Signed extend
SYSExecute System coprocessor instruction
TBB, TBHTable Branch Byte, Halfword
TEQTest Equivalence
TST Test
[BETA] TT, TTT, TTA, TTAT Test Target (Alternate Domain, Unprivileged)
UADD8, UADD16, UASXParallel Unsigned arithmetic
UDIVUnsigned Divide
UHADD8, UHADD16, UHASX, UHSUB8, UHSUB16, UHSAXParallel Unsigned Halving arithmetic
UMAALUnsigned Multiply Accumulate AccumulateLong
 (64 <= 32 + 32 + 32 x 32)
UMLAL, UMULLUnsigned Multiply Accumulate,Unsigned Multiply
 (64 <= 32 x 32 + 64), (64 <= 32 x 32)
UQADD8, UQADD16, UQASX, UQSUB8, UQSUB16, UQSAXParallel Unsigned Saturating arithmetic
USAD8Unsigned Sum of Absolute Differences
USADA8Accumulate Unsigned Sum of Absolute Differences
USATUnsigned Saturate
USAT16Unsigned Saturate, parallel halfwords
USUB8, USUB16, USAXParallel Unsigned arithmetic
UXTAB, UXTAB16, UXTAHUnsigned extend with Addition
UXTB, UXTHUnsigned extend
UXTB16Unsigned extend
V* See Chapter 14 Advanced SIMD Instructions (32-bit) and Chapter 15 Floating-point Instructions (32-bit)
WFE, WFI, YIELDWait For Event, Wait For Interrupt, Yield
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