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13.87 QSUB8

Signed saturating parallel byte-wise subtraction.


QSUB8{cond} {Rd}, Rn, Rm



is an optional condition code.


is the destination register.

Rm, Rn

are the ARM registers holding the operands.


This instruction subtracts each byte of the second operandfrom the corresponding byte of the first operand and writes theresults into the corresponding bytes of the destination. It saturates theresults to the signed range –27x ≤27 –1. The Q flag is not affected evenif this operation saturates.

Register restrictions

You cannot use PC for any operand.

You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.

Condition flags

This instruction does not affect the N, Z, C, V, Q, or GEflags.


The 32-bit instruction is available in A32 and T32.

There is no 16-bit version of this instruction in T32.

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