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13.120 SMLALxy

Signed Multiply-Accumulate with 16-bit operands and a 64-bit accumulator.


SMLAL<x><y>{cond} RdLo, RdHi, Rn, Rm



is either B or T. B meansuse the bottom half (bits [15:0]) of Rn, T meansuse the top half (bits [31:16]) of Rn.


is either B or T. B meansuse the bottom half (bits [15:0]) of Rm, T meansuse the top half (bits [31:16]) of Rm.


is an optional condition code.

RdLo, RdHi

are the destination registers. They also hold theaccumulate value. RdHi and RdLo mustbe different registers.

Rn, Rm

are the registers holding the values to be multiplied.


SMLALxy multiplies the signed integerfrom the selected half of Rm bythe signed integer from the selected half of Rn,and adds the 32-bit result to the 64-bit value in RdHi and RdLo.

Register restrictions

You cannot use PC for any operand.

You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.

Condition flags

This instruction does not change the flags.


SMLALxy cannot raise an exception. If overflow occurs on this instruction, the result wraps round without any warning.


The 32-bit instruction is available in A32 and T32.

There is no 16-bit version of this instruction in T32.


    SMLALTB     r2, r3, r7, r1    SMLALBTVS   r0, r1, r9, r2

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