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17.72 STRH (register)

Store Register Halfword (register).

Syntax

STRH Wt, [Xn|SP, Rm{, extend {amount}}]

Where:

Wt

Is the 32-bit name of the general-purpose register to be transferred.

Xn|SP

Is the 64-bit name of the general-purpose base register or stack pointer.

R

Is the index width specifier, and can be either W or X.

m

Is the number [0-30] of the general-purpose index register or the name ZR (31).

extend

Is the index extend/shift specifier, defaulting to LSL, and can be one of the values shown in Usage.

amount

Is the index shift amount, optional and defaulting to #0 when extend is not LSL, and can be either #0 or #1.

Usage

Store Register Halfword (register) calculates an address from a base register value and an immediate offset, and stores a halfword from a 32-bit register to the calculated address. For information about memory accesses, see Load/Store addressing modes in the ARMv8-A Architecture Reference Manual.

The instruction uses an offset addressing mode, that calculates the address used for the memory access from a base register value and an offset register value. The offset can be optionally shifted and extended.

The following table shows the valid specifier combinations:

Table 17-25 STRH specifier combinations

Rextend
WSXTW
WUXTW
XLSL
XSXTX
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