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A64 SIMD Vector instructions in alphabetical order

A summary of the A64 SIMD Vector instructions that are supported.

Table 20-1 Summary of A64 SIMD Vector instructions

Mnemonic Brief description See
ABS (vector) Absolute value 20.2 ABS (vector)
ADD (vector) Add 20.3 ADD (vector)
ADDHN, ADDHN2 (vector) Add returning high narrow 20.4 ADDHN, ADDHN2 (vector)
ADDP (vector) Add pairwise 20.5 ADDP (vector)
ADDV (vector) Add across vector 20.6 ADDV (vector)
AND (vector) Bitwise AND 20.7 AND (vector)
BIC (vector, immediate) Bitwise bit clear (immediate) 20.8 BIC (vector, immediate)
BIC (vector, register) Bitwise bit clear (register) 20.9 BIC (vector, register)
BIF (vector) Bitwise insert if false 20.10 BIF (vector)
BIT (vector) Bitwise insert if true 20.11 BIT (vector)
BSL (vector) Bitwise select 20.12 BSL (vector)
CLS (vector) Count leading sign bits 20.13 CLS (vector)
CLZ (vector) Count leading zero bits 20.14 CLZ (vector)
CMEQ (vector, register) Compare bitwise equal, setting destination vector element to all ones if the condition holds, else zero 20.15 CMEQ (vector, register)
CMEQ (vector, zero) Compare bitwise equal to zero, setting destination vector element to all ones if the condition holds, else zero 20.16 CMEQ (vector, zero)
CMGE (vector, register) Compare signed greater than or equal 20.17 CMGE (vector, register)
CMGE (vector, zero) Compare signed greater than or equal to zero, setting destination vector element to all ones if the condition holds, else zero 20.18 CMGE (vector, zero)
CMGT (vector, register) Compare signed greater than, setting destination vector element to all ones if the condition holds, else zero 20.19 CMGT (vector, register)
CMGT (vector, zero) Compare signed greater than zero, setting destination vector element to all ones if the condition holds, else zero 20.20 CMGT (vector, zero)
CMHI (vector, register) Compare unsigned higher, setting destination vector element to all ones if the condition holds, else zero 20.21 CMHI (vector, register)
CMHS (vector, register) Compare unsigned higher or same, setting destination vector element to all ones if the condition holds, else zero 20.22 CMHS (vector, register)
CMLE (vector, zero) Compare signed less than or equal to zero, setting destination vector element to all ones if the condition holds, else zero 20.23 CMLE (vector, zero)
CMLT (vector, zero) Compare signed less than zero, setting destination vector element to all ones if the condition holds, else zero 20.24 CMLT (vector, zero)
CMTST (vector) Compare bitwise test bits nonzero, setting destination vector element to all ones if the condition holds, else zero 20.25 CMTST (vector)
CNT (vector) Population count per byte 20.26 CNT (vector)
DUP (vector, element) Duplicate vector element to vector 20.27 DUP (vector, element)
DUP (vector, general) Duplicate general-purpose register to vector 20.28 DUP (vector, general)
EOR (vector) Bitwise exclusive OR 20.29 EOR (vector)
EXT (vector) Extract vector from pair of vectors 20.30 EXT (vector)
FABD (vector) Floating-point absolute difference 20.31 FABD (vector)
FABS (vector) Floating-point absolute value 20.32 FABS (vector)
FACGE (vector) Floating-point absolute compare greater than or equal 20.33 FACGE (vector)
FACGT (vector) Floating-point absolute compare greater than 20.34 FACGT (vector)
FADD (vector) Floating-point add 20.35 FADD (vector)
FADDP (vector) Floating-point add pairwise 20.36 FADDP (vector)
FCMEQ (vector, register) Floating-point compare equal, setting destination vector element to all ones if the condition holds, else zero 20.37 FCMEQ (vector, register)
FCMEQ (vector, zero) Floating-point compare equal to zero, setting destination vector element to all ones if the condition holds, else zero 20.38 FCMEQ (vector, zero)
FCMGE (vector, register) Floating-point compare greater than or equal, setting destination vector element to all ones if the condition holds, else zero 20.39 FCMGE (vector, register)
FCMGE (vector, zero) Floating-point compare greater than or equal to zero, setting destination vector element to all ones if the condition holds, else zero 20.40 FCMGE (vector, zero)
FCMGT (vector, register) Floating-point compare greater than, setting destination vector element to all ones if the condition holds, else zero 20.41 FCMGT (vector, register)
FCMGT (vector, zero) Floating-point compare greater than zero, setting destination vector element to all ones if the condition holds, else zero 20.42 FCMGT (vector, zero)
FCMLE (vector, zero) Floating-point compare less than or equal to zero, setting destination vector element to all ones if the condition holds, else zero 20.43 FCMLE (vector, zero)
FCMLT (vector, zero) Floating-point compare less than zero, setting destination vector element to all ones if the condition holds, else zero 20.44 FCMLT (vector, zero)
FCVTAS (vector) Floating-point convert to signed integer, rounding to nearest with ties to away 20.45 FCVTAS (vector)
FCVTAU (vector) Floating-point convert to unsigned integer, rounding to nearest with ties to away 20.46 FCVTAU (vector)
FCVTL, FCVTL2 (vector) Floating-point convert to higher precision long 20.47 FCVTL, FCVTL2 (vector)
FCVTMS (vector) Floating-point convert to signed integer, rounding toward minus infinity 20.48 FCVTMS (vector)
FCVTMU (vector) Floating-point convert to unsigned integer, rounding toward minus infinity 20.49 FCVTMU (vector)
FCVTN, FCVTN2 (vector) Floating-point convert to lower precision narrow 20.50 FCVTN, FCVTN2 (vector)
FCVTNS (vector) Floating-point convert to signed integer, rounding to nearest with ties to even 20.51 FCVTNS (vector)
FCVTNU (vector) Floating-point convert to unsigned integer, rounding to nearest with ties to even 20.52 FCVTNU (vector)
FCVTPS (vector) Floating-point convert to signed integer, rounding toward positive infinity 20.53 FCVTPS (vector)
FCVTPU (vector) Floating-point convert to unsigned integer, rounding toward positive infinity 20.54 FCVTPU (vector)
FCVTXN, FCVTXN2 (vector) Floating-point convert to lower precision narrow, rounding to odd 20.55 FCVTXN, FCVTXN2 (vector)
FCVTZS (vector, fixed-point) Floating-point convert to signed fixed-point, rounding toward zero 20.56 FCVTZS (vector, fixed-point)
FCVTZS (vector, integer) Floating-point convert to signed integer, rounding toward zero 20.57 FCVTZS (vector, integer)
FCVTZU (vector, fixed-point) Floating-point convert to unsigned fixed-point, rounding toward zero 20.58 FCVTZU (vector, fixed-point)
FCVTZU (vector, integer) Floating-point convert to unsigned integer, rounding toward zero 20.59 FCVTZU (vector, integer)
FDIV (vector) Floating-point divide 20.60 FDIV (vector)
FMAX (vector) Floating-point maximum 20.61 FMAX (vector)
FMAXNM (vector) Floating-point maximum number 20.62 FMAXNM (vector)
FMAXNMP (vector) Floating-point maximum number pairwise 20.63 FMAXNMP (vector)
FMAXNMV (vector) Floating-point maximum number across vector 20.64 FMAXNMV (vector)
FMAXP (vector) Floating-point maximum pairwise 20.65 FMAXP (vector)
FMAXV (vector) Floating-point maximum across vector 20.66 FMAXV (vector)
FMIN (vector) Floating-point minimum 20.67 FMIN (vector)
FMINNM (vector) Floating-point minimum number 20.68 FMINNM (vector)
FMINNMP (vector) Floating-point minimum number pairwise 20.69 FMINNMP (vector)
FMINNMV (vector) Floating-point minimum number across vector 20.70 FMINNMV (vector)
FMINP (vector) Floating-point minimum pairwise 20.71 FMINP (vector)
FMINV (vector) Floating-point minimum across vector 20.72 FMINV (vector)
FMLA (vector, by element) Floating-point fused multiply-add to accumulator (by element) 20.73 FMLA (vector, by element)
FMLA (vector) Floating-point fused multiply-add to accumulator 20.74 FMLA (vector)
FMLS (vector, by element) Floating-point fused multiply-subtract from accumulator (by element) 20.75 FMLS (vector, by element)
FMLS (vector) Floating-point fused multiply-subtract from accumulator 20.76 FMLS (vector)
FMOV (vector, immediate) Floating-point move immediate 20.77 FMOV (vector, immediate)
FMUL (vector, by element) Floating-point multiply (by element) 20.78 FMUL (vector, by element)
FMUL (vector) Floating-point multiply 20.79 FMUL (vector)
FMULX (vector, by element) Floating-point multiply extended (by element) 20.80 FMULX (vector, by element)
FMULX (vector) Floating-point multiply extended 20.81 FMULX (vector)
FNEG (vector) Floating-point negate 20.82 FNEG (vector)
FRECPE (vector) Floating-point reciprocal estimate 20.83 FRECPE (vector)
FRECPS (vector) Floating-point reciprocal step 20.84 FRECPS (vector)
FRINTA (vector) Floating-point round to integral, to nearest with ties to away 20.85 FRINTA (vector)
FRINTI (vector) Floating-point round to integral, using current rounding mode 20.86 FRINTI (vector)
FRINTM (vector) Floating-point round to integral, toward minus infinity 20.87 FRINTM (vector)
FRINTN (vector) Floating-point round to integral, to nearest with ties to even 20.88 FRINTN (vector)
FRINTP (vector) Floating-point round to integral, toward positive infinity 20.89 FRINTP (vector)
FRINTX (vector) Floating-point round to integral exact, using current rounding mode 20.90 FRINTX (vector)
FRINTZ (vector) Floating-point round to integral, toward zero 20.91 FRINTZ (vector)
FRSQRTE (vector) Floating-point reciprocal square root estimate 20.92 FRSQRTE (vector)
FRSQRTS (vector) Floating-point reciprocal square root step 20.93 FRSQRTS (vector)
FSQRT (vector) Floating-point square root 20.94 FSQRT (vector)
FSUB (vector) Floating-point subtract 20.95 FSUB (vector)
INS (vector, element) Insert vector element from another vector element 20.96 INS (vector, element)
INS (vector, general) Insert vector element from general-purpose register 20.97 INS (vector, general)
LD1 (vector, multiple structures) Load multiple 1-element structures to one, two, three or four registers 20.98 LD1 (vector, multiple structures)
LD1 (vector, single structure) Load single 1-element structure to one lane of one register 20.99 LD1 (vector, single structure)
LD1R (vector) Load single 1-element structure and replicate to all lanes (of one register) 20.100 LD1R (vector)
LD2 (vector, multiple structures) Load multiple 2-element structures to two registers 20.101 LD2 (vector, multiple structures)
LD2 (vector, single structure) Load single 2-element structure to one lane of two registers 20.102 LD2 (vector, single structure)
LD2R (vector) Load single 2-element structure and replicate to all lanes of two registers 20.103 LD2R (vector)
LD3 (vector, multiple structures) Load multiple 3-element structures to three registers 20.104 LD3 (vector, multiple structures)
LD3 (vector, single structure) Load single 3-element structure to one lane of three registers) 20.105 LD3 (vector, single structure)
LD3R (vector) Load single 3-element structure and replicate to all lanes of three registers 20.106 LD3R (vector)
LD4 (vector, multiple structures) Load multiple 4-element structures to four registers 20.107 LD4 (vector, multiple structures)
LD4 (vector, single structure) Load single 4-element structure to one lane of four registers 20.108 LD4 (vector, single structure)
LD4R (vector) Load single 4-element structure and replicate to all lanes of four registers 20.109 LD4R (vector)
MLA (vector, by element) Multiply-add to accumulator (by element) 20.110 MLA (vector, by element)
MLA (vector) Multiply-add to accumulator 20.111 MLA (vector)
MLS (vector, by element) Multiply-subtract from accumulator (by element) 20.112 MLS (vector, by element)
MLS (vector) Multiply-subtract from accumulator 20.113 MLS (vector)
MOV (vector, element) Move vector element to another vector element 20.114 MOV (vector, element)
MOV (vector, from general) Move general-purpose register to a vector element 20.115 MOV (vector, from general)
MOV (vector) Move vector 20.116 MOV (vector)
MOV (vector, to general) Move vector element to general-purpose register 20.117 MOV (vector, to general)
MOVI (vector) Move immediate 20.118 MOVI (vector)
MUL (vector, by element) Multiply (by element) 20.119 MUL (vector, by element)
MUL (vector) Multiply 20.120 MUL (vector)
MVN (vector) Bitwise NOT 20.121 MVN (vector)
MVNI (vector) Move inverted immediate 20.122 MVNI (vector)
NEG (vector) Negate 20.123 NEG (vector)
NOT (vector) Bitwise NOT 20.124 NOT (vector)
ORN (vector) Bitwise inclusive OR NOT 20.125 ORN (vector)
ORR (vector, immediate) Bitwise inclusive OR (immediate) 20.126 ORR (vector, immediate)
ORR (vector, register) Bitwise inclusive OR (register) 20.127 ORR (vector, register)
PMUL (vector) Polynomial multiply 20.128 PMUL (vector)
PMULL, PMULL2 (vector) Polynomial multiply long 20.129 PMULL, PMULL2 (vector)
RADDHN, RADDHN2 (vector) Rounding add returning high narrow 20.130 RADDHN, RADDHN2 (vector)
RBIT (vector) Reverse bit order 20.131 RBIT (vector)
REV16 (vector) Reverse elements in 16-bit halfwords 20.132 REV16 (vector)
REV32 (vector) Reverse elements in 32-bit words 20.133 REV32 (vector)
REV64 (vector) Reverse elements in 64-bit doublewords 20.134 REV64 (vector)
RSHRN, RSHRN2 (vector) Rounding shift right narrow (immediate) 20.135 RSHRN, RSHRN2 (vector)
RSUBHN, RSUBHN2 (vector) Rounding subtract returning high narrow 20.136 RSUBHN, RSUBHN2 (vector)
SABA (vector) Signed absolute difference and accumulate 20.137 SABA (vector)
SABAL, SABAL2 (vector) Signed absolute difference and accumulate long 20.138 SABAL, SABAL2 (vector)
SABD (vector) Signed absolute difference 20.139 SABD (vector)
SABDL, SABDL2 (vector) Signed absolute difference long 20.140 SABDL, SABDL2 (vector)
SADALP (vector) Signed add and accumulate long pairwise 20.141 SADALP (vector)
SADDL, SADDL2 (vector) Signed add long 20.142 SADDL, SADDL2 (vector)
SADDLP (vector) Signed add long pairwise 20.143 SADDLP (vector)
SADDLV (vector) Signed add long across vector 20.144 SADDLV (vector)
SADDW, SADDW2 (vector) Signed add wide 20.145 SADDW, SADDW2 (vector)
SCVTF (vector, fixed-point) Signed fixed-point convert to floating-point 20.146 SCVTF (vector, fixed-point)
SCVTF (vector, integer) Signed integer convert to floating-point 20.147 SCVTF (vector, integer)
SHADD (vector) Signed halving add 20.148 SHADD (vector)
SHL (vector) Shift left (immediate) 20.149 SHL (vector)
SHLL, SHLL2 (vector) Shift left long (by element size) 20.150 SHLL, SHLL2 (vector)
SHRN, SHRN2 (vector) Shift right narrow (immediate) 20.151 SHRN, SHRN2 (vector)
SHSUB (vector) Signed halving subtract 20.152 SHSUB (vector)
SLI (vector) Shift left and insert (immediate) 20.153 SLI (vector)
SMAX (vector) Signed maximum 20.154 SMAX (vector)
SMAXP (vector) Signed maximum pairwise 20.155 SMAXP (vector)
SMAXV (vector) Signed maximum across vector 20.156 SMAXV (vector)
SMIN (vector) Signed minimum 20.157 SMIN (vector)
SMINP (vector) Signed minimum pairwise 20.158 SMINP (vector)
SMINV (vector) Signed minimum across vector 20.159 SMINV (vector)
SMLAL, SMLAL2 (vector, by element) Signed multiply-add long (by element) 20.160 SMLAL, SMLAL2 (vector, by element)
SMLAL, SMLAL2 (vector) Signed multiply-add long 20.161 SMLAL, SMLAL2 (vector)
SMLSL, SMLSL2 (vector, by element) Signed multiply-subtract long (by element) 20.162 SMLSL, SMLSL2 (vector, by element)
SMLSL, SMLSL2 (vector) Signed multiply-subtract long 20.163 SMLSL, SMLSL2 (vector)
SMOV (vector) Signed move vector element to general-purpose register 20.164 SMOV (vector)
SMULL, SMULL2 (vector, by element) Signed multiply long (by element) 20.165 SMULL, SMULL2 (vector, by element)
SMULL, SMULL2 (vector) Signed multiply long 20.166 SMULL, SMULL2 (vector)
SQABS (vector) Signed saturating absolute value 20.167 SQABS (vector)
SQADD (vector) Signed saturating add 20.168 SQADD (vector)
SQDMLAL, SQDMLAL2 (vector, by element) Signed saturating doubling multiply-add long (by element) 20.169 SQDMLAL, SQDMLAL2 (vector, by element)
SQDMLAL, SQDMLAL2 (vector) Signed saturating doubling multiply-add long 20.170 SQDMLAL, SQDMLAL2 (vector)
SQDMLSL, SQDMLSL2 (vector, by element) Signed saturating doubling multiply-subtract long (by element) 20.171 SQDMLSL, SQDMLSL2 (vector, by element)
SQDMLSL, SQDMLSL2 (vector) Signed saturating doubling multiply-subtract long 20.172 SQDMLSL, SQDMLSL2 (vector)
SQDMULH (vector, by element) Signed saturating doubling multiply returning high half (by element) 20.173 SQDMULH (vector, by element)
SQDMULH (vector) Signed saturating doubling multiply returning high half 20.174 SQDMULH (vector)
SQDMULL, SQDMULL2 (vector, by element) Signed saturating doubling multiply long (by element) 20.175 SQDMULL, SQDMULL2 (vector, by element)
SQDMULL, SQDMULL2 (vector) Signed saturating doubling multiply long 20.176 SQDMULL, SQDMULL2 (vector)
SQNEG (vector) Signed saturating negate 20.177 SQNEG (vector)
SQRDMULH (vector, by element) Signed saturating rounding doubling multiply returning high half (by element) 20.178 SQRDMULH (vector, by element)
SQRDMULH (vector) Signed saturating rounding doubling multiply returning high half 20.179 SQRDMULH (vector)
SQRSHL (vector) Signed saturating rounding shift left (register) 20.180 SQRSHL (vector)
SQRSHRN, SQRSHRN2 (vector) Signed saturating rounded shift right narrow (immediate) 20.181 SQRSHRN, SQRSHRN2 (vector)
SQRSHRUN, SQRSHRUN2 (vector) Signed saturating rounded shift right unsigned narrow (immediate) 20.182 SQRSHRUN, SQRSHRUN2 (vector)
SQSHL (vector, immediate) Signed saturating shift left (immediate) 20.183 SQSHL (vector, immediate)
SQSHL (vector, register) Signed saturating shift left (register) 20.184 SQSHL (vector, register)
SQSHLU (vector) Signed saturating shift left unsigned (immediate) 20.185 SQSHLU (vector)
SQSHRN, SQSHRN2 (vector) Signed saturating shift right narrow (immediate) 20.186 SQSHRN, SQSHRN2 (vector)
SQSHRUN, SQSHRUN2 (vector) Signed saturating shift right unsigned narrow (immediate) 20.187 SQSHRUN, SQSHRUN2 (vector)
SQSUB (vector) Signed saturating subtract 20.188 SQSUB (vector)
SQXTN, SQXTN2 (vector) Signed saturating extract narrow 20.189 SQXTN, SQXTN2 (vector)
SQXTUN, SQXTUN2 (vector) Signed saturating extract unsigned narrow 20.190 SQXTUN, SQXTUN2 (vector)
SRHADD (vector) Signed rounding halving add 20.191 SRHADD (vector)
SRI (vector) Shift right and insert (immediate) 20.192 SRI (vector)
SRSHL (vector) Signed rounding shift left (register) 20.193 SRSHL (vector)
SRSHR (vector) Signed rounding shift right (immediate) 20.194 SRSHR (vector)
SRSRA (vector) Signed rounding shift right and accumulate (immediate) 20.195 SRSRA (vector)
SSHL (vector) Signed shift left (register) 20.196 SSHL (vector)
SSHLL, SSHLL2 (vector) Signed shift left long (immediate) 20.197 SSHLL, SSHLL2 (vector)
SSHR (vector) Signed shift right (immediate) 20.198 SSHR (vector)
SSRA (vector) Signed shift right and accumulate (immediate) 20.199 SSRA (vector)
SSUBL, SSUBL2 (vector) Signed subtract long 20.200 SSUBL, SSUBL2 (vector)
SSUBW, SSUBW2 (vector) Signed subtract wide 20.201 SSUBW, SSUBW2 (vector)
ST1 (vector, multiple structures) Store multiple 1-element structures from one, two three or four registers 20.202 ST1 (vector, multiple structures)
ST1 (vector, single structure) Store single 1-element structure from one lane of one register 20.203 ST1 (vector, single structure)
ST2 (vector, multiple structures) Store multiple 2-element structures from two registers 20.204 ST2 (vector, multiple structures)
ST2 (vector, single structure) Store single 2-element structure from one lane of two registers 20.205 ST2 (vector, single structure)
ST3 (vector, multiple structures) Store multiple 3-element structures from three registers 20.206 ST3 (vector, multiple structures)
ST3 (vector, single structure) Store single 3-element structure from one lane of three registers 20.207 ST3 (vector, single structure)
ST4 (vector, multiple structures) Store multiple 4-element structures from four registers 20.208 ST4 (vector, multiple structures)
ST4 (vector, single structure) Store single 4-element structure from one lane of four registers 20.209 ST4 (vector, single structure)
SUB (vector) Subtract 20.210 SUB (vector)
SUBHN, SUBHN2 (vector) Subtract returning high narrow 20.211 SUBHN, SUBHN2 (vector)
SUQADD (vector) Signed saturating accumulate of unsigned value 20.212 SUQADD (vector)
SXTL, SXTL2 (vector) Signed extend long 20.213 SXTL, SXTL2 (vector)
TBL (vector) Table vector lookup 20.214 TBL (vector)
TBX (vector) Table vector lookup extension 20.215 TBX (vector)
TRN1 (vector) Transpose vectors (primary) 20.216 TRN1 (vector)
TRN2 (vector) Transpose vectors (secondary) 20.217 TRN2 (vector)
UABA (vector) Unsigned absolute difference and accumulate 20.218 UABA (vector)
UABAL, UABAL2 (vector) Unsigned absolute difference and accumulate long 20.219 UABAL, UABAL2 (vector)
UABD (vector) Unsigned absolute difference 20.220 UABD (vector)
UABDL, UABDL2 (vector) Unsigned absolute difference long 20.221 UABDL, UABDL2 (vector)
UADALP (vector) Unsigned add and accumulate long pairwise 20.222 UADALP (vector)
UADDL, UADDL2 (vector) Unsigned add long 20.223 UADDL, UADDL2 (vector)
UADDLP (vector) Unsigned add long pairwise 20.224 UADDLP (vector)
UADDLV (vector) Unsigned sum long across vector 20.225 UADDLV (vector)
UADDW, UADDW2 (vector) Unsigned add wide 20.226 UADDW, UADDW2 (vector)
UCVTF (vector, fixed-point) Unsigned fixed-point convert to floating-point 20.227 UCVTF (vector, fixed-point)
UCVTF (vector, integer) Unsigned integer convert to floating-point 20.228 UCVTF (vector, integer)
UHADD (vector) Unsigned halving add 20.229 UHADD (vector)
UHSUB (vector) Unsigned halving subtract 20.230 UHSUB (vector)
UMAX (vector) Unsigned maximum 20.231 UMAX (vector)
UMAXP (vector) Unsigned maximum pairwise 20.232 UMAXP (vector)
UMAXV (vector) Unsigned maximum across vector 20.233 UMAXV (vector)
UMIN (vector) Unsigned minimum 20.234 UMIN (vector)
UMINP (vector) Unsigned minimum pairwise 20.235 UMINP (vector)
UMINV (vector) Unsigned minimum across vector 20.236 UMINV (vector)
UMLAL, UMLAL2 (vector, by element) Unsigned multiply-add long (by element) 20.237 UMLAL, UMLAL2 (vector, by element)
UMLAL, UMLAL2 (vector) Unsigned multiply-add long 20.238 UMLAL, UMLAL2 (vector)
UMLSL, UMLSL2 (vector, by element) Unsigned multiply-subtract long (by element) 20.239 UMLSL, UMLSL2 (vector, by element)
UMLSL, UMLSL2 (vector) Unsigned multiply-subtract long 20.240 UMLSL, UMLSL2 (vector)
UMOV (vector) Unsigned move vector element to general-purpose register 20.241 UMOV (vector)
UMULL, UMULL2 (vector, by element) Unsigned multiply long (by element) 20.242 UMULL, UMULL2 (vector, by element)
UMULL, UMULL2 (vector) Unsigned multiply long 20.243 UMULL, UMULL2 (vector)
UQADD (vector) Unsigned saturating add 20.244 UQADD (vector)
UQRSHL (vector) Unsigned saturating rounding shift left (register) 20.245 UQRSHL (vector)
UQRSHRN, UQRSHRN2 (vector) Unsigned saturating rounded shift right narrow (immediate) 20.246 UQRSHRN, UQRSHRN2 (vector)
UQSHL (vector, immediate) Unsigned saturating shift left (immediate) 20.247 UQSHL (vector, immediate)
UQSHL (vector, register) Unsigned saturating shift left (register) 20.248 UQSHL (vector, register)
UQSHRN, UQSHRN2 (vector) Unsigned saturating shift right narrow (immediate) 20.249 UQSHRN, UQSHRN2 (vector)
UQSUB (vector) Unsigned saturating subtract 20.250 UQSUB (vector)
UQXTN, UQXTN2 (vector) Unsigned saturating extract narrow 20.251 UQXTN, UQXTN2 (vector)
URECPE (vector) Unsigned reciprocal estimate 20.252 URECPE (vector)
URHADD (vector) Unsigned rounding halving add 20.253 URHADD (vector)
URSHL (vector) Unsigned rounding shift left (register) 20.254 URSHL (vector)
URSHR (vector) Unsigned rounding shift right (immediate) 20.255 URSHR (vector)
URSQRTE (vector) Unsigned reciprocal square root estimate 20.256 URSQRTE (vector)
URSRA (vector) Unsigned rounding shift right and accumulate (immediate) 20.257 URSRA (vector)
USHL (vector) Unsigned shift left (register) 20.258 USHL (vector)
USHLL, USHLL2 (vector) Unsigned shift left long (immediate) 20.259 USHLL, USHLL2 (vector)
USHR (vector) Unsigned shift right (immediate) 20.260 USHR (vector)
USQADD (vector) Unsigned saturating accumulate of signed value 20.261 USQADD (vector)
USRA (vector) Unsigned shift right and accumulate (immediate) 20.262 USRA (vector)
USUBL, USUBL2 (vector) Unsigned subtract long 20.263 USUBL, USUBL2 (vector)
USUBW, USUBW2 (vector) Unsigned subtract wide 20.264 USUBW, USUBW2 (vector)
UXTL, UXTL2 (vector) Unsigned extend long 20.265 UXTL, UXTL2 (vector)
UZP1 (vector) Unzip vectors (primary) 20.266 UZP1 (vector)
UZP2 (vector) Unzip vectors (secondary) 20.267 UZP2 (vector)
XTN, XTN2 (vector) Extract narrow 20.268 XTN, XTN2 (vector)
ZIP1 (vector) Zip vectors (primary) 20.269 ZIP1 (vector)
ZIP2 (vector) Zip vectors (secondary) 20.270 ZIP2 (vector)
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