20.56 FCVTZS (vector, fixed-point)
Floating-point convert to signed fixed-point, rounding toward zero.
Is the name of the SIMD and FP destination register.
Is an arrangement specifier, and can be one of the values shown in Usage.
Is the name of the SIMD and FP source register.
Is the number of fractional bits, in the range 1 to the element width.
The following table shows the valid specifier combinations:
Table 20-10 FCVTZS (Vector) specifier combinations
|2S||1 to 32|
|4S||1 to 32|
|2D||1 to 64|