You copied the Doc URL to your clipboard.

20.187 SQSHRUN, SQSHRUN2 (vector)

Signed saturating shift right unsigned narrow (immediate).

Syntax

SQSHRUN{2} Vd.Tb, Vn.Ta, #shift

Where:

2

Is the second and upper half specifier. If present it causes the operation to be performed on the upper 64 bits of the registers holding the narrower elements. See Q in the Usage table.

Vd

Is the name of the SIMD and FP destination register.

Tb

Is an arrangement specifier, and can be one of the values shown in Usage.

Vn

Is the name of the SIMD and FP source register.

Ta

Is an arrangement specifier, and can be one of the values shown in Usage.

shift

Is the right shift amount, in the range 1 to the destination element width in bits, and can be one of the values shown in Usage.

Usage

The following table shows the valid specifier combinations:

Table 20-70 SQSHRUN{2} (Vector) specifier combinations

QTbTashift
-8B8H1 to 8
216B8H1 to 8
-4H4S1 to 16
28H4S1 to 16
-2S2D1 to 32
24S2D1 to 32
Was this page helpful? Yes No