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# 20.207 ST3 (vector, single structure)

Store single 3-element structure from one lane of three registers.

### Syntax

ST3 { Vt.B, Vt2.B, Vt3.B }[index], [Xn|SP] ;

ST3 { Vt.H, Vt2.H, Vt3.H }[index], [Xn|SP] ;

ST3 { Vt.S, Vt2.S, Vt3.S }[index], [Xn|SP] ;

ST3 { Vt.D, Vt2.D, Vt3.D }[index], [Xn|SP] ;

ST3 { Vt.B, Vt2.B, Vt3.B }[index], [Xn|SP], #3 ;

ST3 { Vt.B, Vt2.B, Vt3.B }[index], [Xn|SP], Xm ;

ST3 { Vt.H, Vt2.H, Vt3.H }[index], [Xn|SP], #6 ;

ST3 { Vt.H, Vt2.H, Vt3.H }[index], [Xn|SP], Xm ;

ST3 { Vt.S, Vt2.S, Vt3.S }[index], [Xn|SP], #12 ;

ST3 { Vt.S, Vt2.S, Vt3.S }[index], [Xn|SP], Xm ;

ST3 { Vt.D, Vt2.D, Vt3.D }[index], [Xn|SP], #24 ;

ST3 { Vt.D, Vt2.D, Vt3.D }[index], [Xn|SP], Xm ;

Where:

Vt

Is the name of the first or only SIMD and FP register to be transferred.

Vt2

Is the name of the second SIMD and FP register to be transferred.

Vt3

Is the name of the third SIMD and FP register to be transferred.

index

The value depends on the instruction variant:

8
Is the element index, in the range 0 to 15
16
Is the element index, in the range 0 to 7
32
Is the element index, in the range 0 to 3
64
Is the element index, and can be either 0 or 1
Xn|SP

Is the 64-bit name of the general-purpose base register or stack pointer.

Xm

Is the 64-bit name of the general-purpose post-index register, excluding XZR.