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Summary of Advanced SIMD instructions

Most Advanced SIMD instructions are not available in floating-point.

The following table shows a summary of Advanced SIMD instructions that are not available as floating-point instructions:

Table 14-1 Summary of Advanced SIMD instructions

MnemonicBrief description
VABA, VABDAbsolute difference and Accumulate, AbsoluteDifference
VABSAbsolute value
VACGE, VACGTAbsolute Compare Greater than or Equal, GreaterThan
VACLE, VACLTAbsolute Compare Less than or Equal, Less Than(pseudo-instructions)
VADDHNAdd, select High half
VANDBitwise AND (pseudo-instruction)
VBICBitwise Bit Clear (register)
VBICBitwise Bit Clear (immediate)
VBIF, VBIT, VBSLBitwise Insert if False, Insert if True, Select
VCEQ, VCLE, VCLTCompare Equal, Less than or Equal, CompareLess Than
VCGE, VCGTCompare Greater than or Equal, Greater Than
VCLE, VCLTCompare Less than or Equal, Compare Less Than(pseudo-instruction)
VCLS, VCLZ, VCNTCount Leading Sign bits, Count Leading Zeros,and Count set bits
VCVTConvert fixed-point or integer to floating-point,floating-point to integer or fixed-point
VCVTConvert floating-point to integer with directedrounding modes
VCVTConvert between half-precision and single-precisionfloating-point numbers
VDUPDuplicate scalar to all lanes of vector
VEORBitwise Exclusive OR
VFMA, VFMSFused Multiply Accumulate, Fused Multiply Subtract
VHADD, VHSUBHalving Add, Halving Subtract
VLDVector Load
VMAX, VMINMaximum, Minimum
VMAXNM, VMINNMMaximum, Minimum, consistent with IEEE 754-2008
VMLA, VMLSMultiply Accumulate, Multiply Subtract (vector)
VMLA, VMLSMultiply Accumulate, Multiply Subtract (byscalar)
VMOVMove (immediate)
VMOVMove (register)
VMOVL, VMOV{U}NMove Long, Move Narrow (register)
VMULMultiply (vector)
VMULMultiply (by scalar)
VMVNMove Negative (immediate)
VORNBitwise OR NOT (pseudo-instruction)
VORRBitwise OR (register)
VORRBitwise OR (immediate)
VPADD, VPADALPairwise Add, Pairwise Add and Accumulate
VPMAX, VPMINPairwise Maximum, Pairwise Minimum
VQABSAbsolute value, saturate
VQADDAdd, saturate
VQDMLAL, VQDMLSLSaturating Doubling Multiply Accumulate, andMultiply Subtract
VQDMULLSaturating Doubling Multiply

Saturating Doubling Multiply returningHigh half

VQMOV{U}NSaturating Move (register)
VQNEGNegate, saturate

Saturating Doubling Multiply returningHigh half

VQRSHLShift Left, Round, saturate (by signed variable)
VQRSHR{U}NShift Right, Round, saturate (by immediate)
VQSHLShift Left, saturate (by immediate)
VQSHLShift Left, saturate (by signed variable)
VQSHR{U}NShift Right, saturate (by immediate)
VQSUBSubtract, saturate
VRADDHNAdd, select High half, Round
VRECPEReciprocal Estimate
VRECPSReciprocal Step
VREVReverse elements
VRHADDHalving Add, Round
VRINTRound to integer
VRSHRShift Right and Round (by immediate)
VRSHRNShift Right, Round, Narrow (by immediate)
VRSQRTEReciprocal Square Root Estimate
VRSQRTSReciprocal Square Root Step
VRSRAShift Right, Round, and Accumulate (by immediate)
VRSUBHNSubtract, select High half, Round
VSHLShift Left (by immediate)
VSHRShift Right (by immediate)
VSHRNShift Right, Narrow (by immediate)
VSLIShift Left and Insert
VSRAShift Right, Accumulate (by immediate)
VSRIShift Right and Insert
VSTVector Store
VSUBHNSubtract, select High half
VSWPSwap vectors
VTBL, VTBXVector table look-up
VTRNVector transpose
VTSTTest bits
VUZP, VZIPVector interleave and de-interleave
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