Extension register load.
is an optional condition code.
is the extension register to be loaded.
is the ARM register holding the base address forthe transfer.
is an optional numeric expression. It must evaluateto a numeric value at assembly time. The value must be a multipleof 4, and lie in the range –1020 to +1020. The value is added tothe base address to form the address used for the transfer.
is a PC-relative expression.
labelmust be alignedon a word boundary within ±1KB of the current instruction.
VLDR instruction loads an extensionregister from memory.
Two words are transferred.
There is also a