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15.18 VMLA (floating-point)

Floating-point multiply accumulate.

Syntax

VMLA{cond}.F32 Sd, Sn, Sm

VMLA{cond}.F64 Dd, Dn, Dm

where:

cond

is an optional condition code.

Sd, Sn, Sm

are the single-precision registers for the resultand operands.

Dd, Dn, Dm

are the double-precision registers for the resultand operands.

Operation

The VMLA instruction multipliesthe values in the operand registers, adds the value in the destinationregister, and places the final result in the destination register.

Floating-point exceptions

This instruction can produce Invalid Operation, Overflow,Underflow, Inexact, or Input Denormal exceptions.

Related reference

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