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15.39 VSUB (floating-point)

Floating-point subtract.


VSUB{cond}.F32 {Sd}, Sn, Sm

VSUB{cond}.F64 {Dd}, Dn, Dm



is an optional condition code.

Sd, Sn, Sm

are the single-precision registers for the resultand operands.

Dd, Dn, Dm

are the double-precision registers for the resultand operands.


The VSUB instruction subtractsthe value in the second operand register from the value in the first operandregister, and places the result in the destination register.

Floating-point exceptions

The VSUB instruction can produceInvalid Operation, Overflow, or Inexact exceptions.

Related reference

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