A32 and T32 instruction set overview
A32 and T32 instructions can be grouped by functional area.
All A32 instructions are 32 bits long. Instructions are storedword-aligned, so the least significant two bits of instruction addressesare always zero in A32 state.
T32 instructions are either 16 or 32 bits long. Instructionsare stored half-word aligned. Some instructions use the least significantbit of the address to determine whether the code being branchedto is T32 or A32.
Before the introduction of 32-bit T32 instructions, the T32instruction set was limited to a restricted subset of the functionalityof the A32 instruction set. Almost all T32 instructions were 16-bit.Together, the 32-bit and 16-bit T32 instructions provide functionalitythat is almost identical to that of the A32 instruction set.
The following table describes someof the functional groupings of the available instructions.
Table 3-4 A32 instruction groups
Branch and control
These instructions do the following:
These instructions operate on the general-purposeregisters. They can perform operations such as addition, subtraction,or bitwise logic on the contents of two registers and place theresult in a third register. They can also operate on the value ina single register, or on a value in a register and an immediatevalue supplied within the instruction.
Long multiplyinstructions give a 64-bit result in two registers.
Register load and store
These instructions load or store thevalue of a single register from or to memory. They can load or storea 32-bit word, a 16-bit halfword, or an 8-bit unsigned byte. Byteand halfword loads can either be sign extended or zero extendedto fill the 32-bit register.
A few instructions arealso defined that can load or store 64-bit doubleword values intotwo 32-bit registers.
Multiple register load and store
These instructions load or store anysubset of the general-purpose registers from or to memory.
Status register access
These instructions move the contentsof a status register to or from a general-purpose register.