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General-purposeregisters in AArch32 state

There are restrictions on the use of SP and LR as general-purpose registers.

There are 33 general-purpose 32-bit registers, including thebanked SP and LR registers. Fifteen general-purpose registers arevisible at any one time, depending on the current processor mode. Theseare R0-R12, SP, and LR. The PC (R15) is not considered a general-purposeregister.

SP (or R13) is the stack pointer. The C and C++ compilers always use SP as the stack pointer. ARM® deprecates most uses of SP as a general purpose register. In T32 state, SP is strictly defined as the stack pointer. The instruction pages in the A32 and T32 Instructions chapter describe when SP and PC can be used.

In User mode, LR (or R14) is used as a link register tostore the return address when a subroutine call is made. It canalso be used as a general-purpose register if the return addressis stored on the stack.

In the exception handling modes, LR holds the return addressfor the exception, or a subroutine return address if subroutinecalls are executed within an exception. LR can be used as a general-purposeregister if the return address is stored on the stack.

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