Address alignmentin A32/T32 code
In ARMv7-A and ARMv7-R, the A bit in the System Control Register (SCTLR) controls whether alignment checking is enabled or disabled. In ARMv7-M, the
UNALIGN_TRP bit, bit 3, in the Configuration and Control Register (CCR) controls this.
If alignment checking is enabled, all unaligned word and halfwordtransfers cause an alignment exception. If disabled, unaligned accessesare permitted for the
TBH instructions. Other data-accessing instructionsalways cause an alignment exception for unaligned data.
LDRD, thespecified address must be word-aligned.
If all your data accesses are aligned, you can use the
--no_unaligned_access command-line option,to avoid linking in any library functions that support unalignedaccesses.