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VMOV (between an ARM register and an Advanced SIMD scalar)
Transfer contents between an ARM register and an Advanced SIMD scalar.
Syntax
VMOV{condsizeDnxRd
VMOV{conddatatypeRdDnx
where:
condis an optional condition code.
sizethe data size. Can be
8,16, or32. If omitted,size32.datatypethe data type. Can be
U8,S8,U16,S16, or32. If omitted,datatype32.Dn[x]is the Advanced SIMD scalar.
Rdis the ARM register.
Rd
Operation
VMOV transfers
the contents of the least significant byte, halfword, or word of Dn[x], RdRd into Dn[x].
VMOV transfers
the contents of Rd, Dn[x]Dn[x] into the
least significant byte, halfword, or word of Rd.
The remaining bits of Rd are
either zero or sign extended.