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ARM Compiler armasm User Guide : BFC

BFC

Bit Field Clear.

Syntax

BFC{cond} Rd, #lsb, #width

where:

cond
is an optional condition code.
Rd
is the destination register.
lsb
is the least significant bit that is to be cleared.
width
is the number of bits to be cleared. width must not be 0, and (width+lsb) must be less than or equal to 32.

Operation

Clears adjacent bits in a register. width bits in Rd are cleared, starting at lsb. Other bits in Rd are unchanged.

Register restrictions

You cannot use PC for any register.

You can use SP in the BFC A32 instruction but this is deprecated. You cannot use SP in the BFC T32 instruction.

Condition flags

The BFC instruction does not change the flags.

Architectures

This 32-bit instruction is available in A32 and T32.

There is no 16-bit version of this instruction in T32.

Related reference

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