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ARM Compiler armasm User Guide : DSB

DSB

Data Synchronization Barrier.

Syntax

DSB{cond} {option}

where:

cond

is an optional condition code.

Note

cond is permitted only in T32 code. This is an unconditional instruction in A32.
option

is an optional limitation on the operation of the hint. Permitted values are:

SY
Full system barrier operation. This is the default and can be omitted.
LD
Barrier operation that waits only for loads to complete.
ST
Barrier operation that waits only for stores to complete.
ISH
Barrier operation only to the inner shareable domain.
ISHLD
Barrier operation that waits only for loads to complete, and only applies to the inner shareable domain.
ISHST
Barrier operation that waits only for stores to complete, and only to the inner shareable domain.
NSH
Barrier operation only out to the point of unification.
NSHLD
Barrier operation that waits only for loads to complete and only applies out to the point of unification.
NSHST
Barrier operation that waits only for stores to complete and only out to the point of unification.
OSH
Barrier operation only to the outer shareable domain.
OSHLD
DMB operation that waits only for loads to complete, and only applies to the outer shareable domain.
OSHST
Barrier operation that waits only for stores to complete, and only to the outer shareable domain.

Note

The options LD, ISHLD, NSHLD, and OSHLD are supported only in ARMv8.

Operation

Data Synchronization Barrier acts as a special kind of memory barrier. No instruction in program order after this instruction executes until this instruction completes. This instruction completes when:

  • All explicit memory accesses before this instruction complete.
  • All Cache, Branch predictor and TLB maintenance operations before this instruction complete.

Alias

The following alternative values of option are supported for DSB, but ARM recommends that you do not use them:

  • SH is an alias for ISH.
  • SHST is an alias for ISHST.
  • UN is an alias for NSH.
  • UNST is an alias for NSHST.

Architectures

This 32-bit instruction is available in A32 and T32.

There is no 16-bit version of this instruction in T32.

Related reference

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