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ARM Compiler armasm User Guide : SSAT16


Parallel halfword Saturate.


SSAT16{cond} Rd, #sat, Rn



is an optional condition code.


is the destination register.


specifies the bit position to saturate to, in the range 1 to 16.


is the register holding the operand.


Halfword-wise signed saturation to any bit position.

The SSAT16 instruction saturates each signed halfword to the signed range –2sat–1x ≤ 2sat–1 –1.

Register restrictions

You cannot use PC for any operand.

You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.

Q flag

If saturation occurs on either halfword, this instruction sets the Q flag. To read the state of the Q flag, use an MRS instruction.


The 32-bit instruction is available in A32 and T32.

For the ARMv7-M architecture, the 32-bit T32 instruction is only available in an ARMv7E-M implementation.

There is no 16-bit version of this instruction in T32.

Correct example

    SSAT16  r7, #12, r7

Incorrect example

    SSAT16  r1, #16, r2, LSL #4 ; shifts not permitted with halfword
                                ; saturations