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ARM Compiler armasm User Guide : LDR (register, SIMD and FP)

LDR (register, SIMD and FP)

Load SIMD and FP register (register offset).

Syntax

LDR Bt, [Xn|SP, Rm{, extend {amount}}] ; 8-bit FP/SIMD registers

LDR Ht, [Xn|SP, Rm{, extend {amount}}] ; 16-bit FP/SIMD registers

LDR St, [Xn|SP, Rm{, extend {amount}}] ; 32-bit FP/SIMD registers

LDR Dt, [Xn|SP, Rm{, extend {amount}}] ; 64-bit FP/SIMD registers

LDR Qt, [Xn|SP, Rm{, extend {amount}}] ; 128-bit FP/SIMD registers

Where:

Bt

Is the 8-bit name of the SIMD and FP register to be transferred.

amount

Is the index shift amount, optional and defaulting to #0 when extend is not LSL:

8-bit FP/SIMD registers

Must be #0.

16-bit FP/SIMD registers

Can be one of #0 or #1.

32-bit FP/SIMD registers

Can be one of #0 or #2.

64-bit FP/SIMD registers

Can be one of #0 or #3.

128-bit FP/SIMD registers

Can be one of #0 or #4.

Ht

Is the 16-bit name of the SIMD and FP register to be transferred.

St

Is the 32-bit name of the SIMD and FP register to be transferred.

Dt

Is the 64-bit name of the SIMD and FP register to be transferred.

Qt

Is the 128-bit name of the SIMD and FP register to be transferred.

Xn|SP

Is the 64-bit name of the general-purpose base register or stack pointer.

R

Is the index width specifier, and can be either W or X.

m

Is the number [0-30] of the general-purpose index register or the name ZR (31).

extend

Is the index extend/shift specifier, defaulting to LSL, and can be one of the values shown in Usage.

Usage

The following table shows the valid specifier combinations:

Table 17-2 LDR (register, SIMD and FP) specifier combinations

R extend
W SXTW
W UXTW
X LSL
X SXTX
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