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ARM Compiler armasm User Guide : STP (SIMD and FP)

STP (SIMD and FP)

Store pair of SIMD and FP registers.

Syntax

STP St1, St2, [Xn|SP], #imm ; 32-bit FP/SIMD registers, Post-index

STP Dt1, Dt2, [Xn|SP], #imm ; 64-bit FP/SIMD registers, Post-index

STP Qt1, Qt2, [Xn|SP], #imm ; 128-bit FP/SIMD registers, Post-index

STP St1, St2, [Xn|SP, #imm]! ; 32-bit FP/SIMD registers, Pre-index

STP Dt1, Dt2, [Xn|SP, #imm]! ; 64-bit FP/SIMD registers, Pre-index

STP Qt1, Qt2, [Xn|SP, #imm]! ; 128-bit FP/SIMD registers, Pre-index

STP St1, St2, [Xn|SP{, #imm}] ; 32-bit FP/SIMD registers, Signed offset

STP Dt1, Dt2, [Xn|SP{, #imm}] ; 64-bit FP/SIMD registers, Signed offset

STP Qt1, Qt2, [Xn|SP{, #imm}] ; 128-bit FP/SIMD registers, Signed offset

Where:

St1

Is the 32-bit name of the first SIMD and FP register to be transferred.

St2

Is the 32-bit name of the second SIMD and FP register to be transferred.

imm

Depends on the instruction variant:

32-bit FP/SIMD registers

Is the signed immediate byte offset, a multiple of 4 in the range -256 to 252.

64-bit FP/SIMD registers

Is the signed immediate byte offset, a multiple of 8 in the range -512 to 504.

128-bit FP/SIMD registers

Is the signed immediate byte offset, a multiple of 16 in the range -1024 to 1008.

Dt1

Is the 64-bit name of the first SIMD and FP register to be transferred.

Dt2

Is the 64-bit name of the second SIMD and FP register to be transferred.

Qt1

Is the 128-bit name of the first SIMD and FP register to be transferred.

Qt2

Is the 128-bit name of the second SIMD and FP register to be transferred.

Xn|SP

Is the 64-bit name of the general-purpose base register or stack pointer.

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