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ARM Compiler armasm User Guide : CMN (shifted register)

CMN (shifted register)

Compare Negative (shifted register).

This instruction is an alias of ADDS (shifted register).

Syntax

CMN Wn, Wm{, shift #amount} ; 32-bit general registers

Equivalent to ADDS WZR, Wn, Wm {, shift #amount}.

CMN Xn, Xm{, shift #amount} ; 64-bit general registers

Equivalent to ADDS XZR, Xn, Xm {, shift #amount}.

Where:

Wn

Is the 32-bit name of the first general-purpose source register.

Wm

Is the 32-bit name of the second general-purpose source register.

amount

Depends on the instruction variant:

32-bit general registers

Is the shift amount, in the range 0 to 31, defaulting to 0.

64-bit general registers

Is the shift amount, in the range 0 to 63, defaulting to 0.

Xn

Is the 64-bit name of the first general-purpose source register.

Xm

Is the 64-bit name of the second general-purpose source register.

shift

Is the optional shift type to be applied to the second source operand, defaulting to LSL, and can be one of LSL, LSR, or ASR.

Operation

Compare Negative (shifted register) adds a register value and an optionally-shifted register value. It updates the condition flags based on the result, and discards the result.

Rn + shift(Rm, amount), where R is either W or X.

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