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ARM Compiler armasm User Guide : FCVTXN, FCVTXN2 (vector)

FCVTXN, FCVTXN2 (vector)

Floating-point convert to lower precision narrow, rounding to odd.

Syntax

FCVTXN{2} Vd.Tb, Vn.Ta

Where:

2

Is the second and upper half specifier. If present it causes the operation to be performed on the upper 64 bits of the registers holding the narrower elements. See Q in the Usage table.

Vd

Is the name of the SIMD and FP destination register.

Tb

Is an arrangement specifier, and can be either 2S or 4S.

Vn

Is the name of the SIMD and FP source register.

Ta

Is an arrangement specifier, 2D.

Usage

The following table shows the valid specifier combinations:

Table 20-9 FCVTXN{2} (Vector) specifier combinations

Q Tb Ta
- 2S 2D
2 4S 2D
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