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ARM Compiler armasm User Guide : SRSHL (vector)

SRSHL (vector)

Signed rounding shift left (register).

Syntax

SRSHL Vd.T, Vn.T, Vm.T

Where:

Vd

Is the name of the SIMD and FP destination register.

T

Is an arrangement specifier, and can be one of 8B, 16B, 4H, 8H, 2S, 4S or 2D.

Vn

Is the name of the first SIMD and FP source register.

Vm

Is the name of the second SIMD and FP source register.

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