You copied the Doc URL to your clipboard.
VAND (register)
Vector bitwise AND.
Syntax
VAND
{
}{.cond
}
{datatype
}, Qd
,
Qn
Qm
VAND
{
}{.cond
}
{datatype
}, Dd
,
Dn
Dm
where:
cond
is an optional condition code.
datatype
is an optional data type. The assembler ignores
.datatype
Qd, Qn, Qm
specifies the destination register, the first operand register, and the second operand register, for a quadword operation.
Dd, Dn, Dm
specifies the destination register, the first operand register, and the second operand register, for a doubleword operation.
Operation
VAND
performs a bitwise logical AND between two registers, and places the
result in the destination register.