You copied the Doc URL to your clipboard.

ARM Compiler armasm User Guide : VCLT (immediate #0)

VCLT (immediate #0)

Vector Compare Less Than zero.

Syntax

VCLT{cond}.datatype {Qd}, Qn, #0

VCLT{cond}.datatype {Dd}, Dn, #0

where:

cond

is an optional condition code.

datatype

must be one of S8, S16, S32, or F32.

The result datatype is:

  • I32 for operand datatypes S32 or F32.

  • I16 for operand datatype S16.

  • I8 for operand datatype S8.

Qd, Qn, Qm

specifies the destination register and the operand register, for a quadword operation.

Dd, Dn, Dm

specifies the destination register and the operand register, for a doubleword operation.

#0

specifies a comparison with zero.

Operation

VCLT takes the value of each element in a vector, and compares it with zero. If the condition is true, the corresponding element in the destination vector is set to all ones. Otherwise, it is set to all zeros.

Related reference

Was this page helpful? Yes No