ALIGN
The ALIGN
directive aligns the current location to a specified boundary by padding with zeros or NOP
instructions.
Syntax
ALIGN
{
{,expr
{,offset{,pad
}}}} padsize
where:
expr
is a numeric expression evaluating to any power of 2 from 20 to 231
offset
can be any numeric expression
pad
can be any numeric expression
padsize
can be 1, 2 or 4.
Operation
The current location is aligned to the next lowest address of the form:
offset
+
n
* expr
is
any integer which the assembler selects to minimise padding.n
If expr
is not specified, ALIGN
sets the current location to the next word (four byte)
boundary. The unused space between the previous and the new current location are filled
with:
Copies of
pad
, ifpad
is specified.NOP
instructions, if all the following conditions are satisfied:pad
is not specified.The
ALIGN
directive follows ARM or Thumb instructions.The current section has the
CODEALIGN
attribute set on theAREA
directive.
Zeros otherwise.
pad
is treated as a byte, halfword, or
word, according to the value of padsize
. If padsize
is not specified, pad
defaults to bytes in data sections, halfwords in Thumb code, or words in ARM code.
Usage
Use ALIGN
to ensure that your data and
code is aligned to appropriate boundaries. This is typically required in the following
circumstances:
The
ADR
Thumb pseudo-instruction can only load addresses that are word aligned, but a label within Thumb code might not be word aligned. UseALIGN 4
to ensure four-byte alignment of an address within Thumb code.Use
ALIGN
to take advantage of caches on some ARM processors. For example, the ARM940T has a cache with 16-byte lines. UseALIGN 16
to align function entries on 16-byte boundaries and maximize the efficiency of the cache.label on a line by itself can be arbitrarily aligned. Following ARM code is word-aligned (Thumb code is halfword aligned). The label therefore does not address the code correctly. Use
ALIGN 4
(orALIGN 2
for Thumb) before the label.
Alignment is relative to the start of the ELF section where the routine is
located. The section must be aligned to the same, or coarser, boundaries. The ALIGN
attribute on the AREA
directive is specified differently.
Examples
AREA cacheable, CODE, ALIGN=3 rout1 ; code ; aligned on 8-byte boundary ; code MOV pc,lr ; aligned only on 4-byte boundary ALIGN 8 ; now aligned on 8-byte boundary rout2 ; code
In the following example, the ALIGN
directive tells the assembler that the next instruction is word aligned and offset by 3
bytes. The 3 byte offset is counted from the previous word aligned address, resulting in the
second DCB
placed in the last byte of the same word and 2
bytes of padding are to be added.
AREA OffsetExample, CODE DCB 1 ; This example places the two bytes in the first ALIGN 4,3 ; and fourth bytes of the same word. DCB 1 ; The second DCB is offset by 3 bytes from the ; first DCB.
In the following example, the ALIGN
directive tells the assembler that the next instruction is word aligned and offset by 2
bytes. Here, the 2 byte offset is counted from the next word aligned address, so the value
is set to 1
(n
=0 clashes with
the third n
DCB
). This time three bytes of padding are to be
added.
AREA OffsetExample1, CODE DCB 1 ; In this example, n cannot be 0 because it DCB 1 ; clashes with the 3rd DCB. The assembler DCB 1 ; sets n to 1. ALIGN 4,2 ; The next instruction is word aligned and DCB 2 ; offset by 2.
In the following example, the DCB
directive makes the PC misaligned. The ALIGN
directive
ensures that the label subroutine1
and the following
instruction are word aligned.
AREA Example, CODE, READONLY start LDR r6,=label1 ; code MOV pc,lr label1 DCB 1 ; PC now misaligned ALIGN ; ensures that subroutine1 addresses subroutine1 ; the following instruction. MOV r5,#0x5