Signed Multiply-Accumulate Wide, with one 32-bit and one 16-bit operand, and a 32-bit accumulate value, providing the top 32 bits of the result.
is either B or T. B means use the bottom half (bits [15:0]) of
Rm, T means use the top half (bits [31:16]) of
is an optional condition code.
is the destination register.
are the registers holding the values to be multiplied.
is the register holding the value to be added.
SMLAWy multiplies the signed 16-bit integer from
the selected half of
Rm by the signed 32-bit integer from
Rn, adds the top 32 bits of the 48-bit result to the
32-bit value in
Ra, and places the result in
You cannot use PC for any operand.
You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.
This instruction does not affect the N, Z, C, or V flags.
If overflow occurs in the accumulation,
the Q flag.
The 32-bit instruction is available in A32 and T32.
For the Arm®v7‑M architecture, the 32-bit T32 instruction is only available in an Armv7E-M implementation.
There is no 16-bit version of this instruction in T32.