Dual 16-bit Signed Multiply with Subtraction of products, and optional exchange of operand halves.
is an optional parameter. If X is present, the most and least significant halfwords of the second operand are exchanged before the multiplications occur.
is an optional condition code.
is the destination register.
are the registers holding the operands.
SMUSD multiplies the bottom halfword
with the bottom halfword of
and the top halfword of
the top halfword of
. It then
subtracts the second product from the first, and stores the difference
You cannot use PC for any operand.
You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.
The 32-bit instruction is available in A32 and T32.
For the Arm®v7‑M architecture, the 32-bit T32 instruction is only available in an Armv7E-M implementation.
There is no 16-bit version of this instruction in T32.
SMUSDXNE r0, r1, r2