VCLT (register)
Vector Compare Less Than.
Syntax
VCLT{conddatatypeQdQnQm
VCLT{conddatatypeDdDnDm
where:
condis an optional condition code.
datatypemust be one of
S8,S16,S32,U8,U16,U32, orF32.The result datatype is:
I32for operand datatypesS32,U32, orF32.I16for operand datatypesS16orU16.I8for operand datatypesS8orU8.
Qd, Qn, Qmspecifies the destination register, the first operand register, and the second operand register, for a quadword operation.
Dd, Dn, Dmspecifies the destination register, the first operand register, and the second operand register, for a doubleword operation.
Operation
VCLT takes the value of each element in a vector, and compares it with the
value of the corresponding element of a second vector. If the condition is true, the
corresponding element in the destination vector is set to all ones. Otherwise, it is set to
all zeros.
Note
On disassembly, this pseudo-instruction is disassembled to the corresponding
VCGT instruction, with the operands reversed.