Updates to the condition flags in A64 code
In AArch64 state, the N, Z, C, and V condition flags are held in the NZCV system register, which is part of the process state. You can access the flags using the
NoteAn instruction updates the condition flags only if the S suffix is specified, except the instructions
TST, which always update the condition flags. The instruction also determines which flags get updated. If a conditional instruction does not execute, it does not affect the flags.
This example shows the read-modify-write procedure to change some of the condition flags in A64 code.
MRS x1, NZCV ; copy N, Z, C, and V flags into general-purpose x1 MOV x2, #0x30000000 BIC x1,x1,x2 ; clears the C and V flags (bits 29,28) ORR x1,x1,#0xC0000000 ; sets the N and Z flags (bits 31,30) MSR NZCV, x1 ; copy x1 back into NZCV register to update the condition flags