Store LORelease Register Halfword.
- Is the 32-bit name of the general-purpose register to be transferred.
- Is the 64-bit name of the general-purpose base register or stack pointer.
Supported in the Arm®v8.1 architecture and later.
Store LORelease Register Halfword stores a halfword from a 32-bit register to a memory location. The instruction also has memory ordering semantics as described in Load LOAcquire, Store LORelease in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile. For information about memory accesses, see Load/Store addressing modes in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile.