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USQADD (vector)

Unsigned saturating Accumulate of Signed value.

Syntax

USQADD Vd.T, Vn.T

Where:

Vd
Is the name of the SIMD and FP destination register.
T
Is an arrangement specifier, and can be one of 8B, 16B, 4H, 8H, 2S, 4S or 2D.
Vn
Is the name of the SIMD and FP source register.

Usage

Unsigned saturating Accumulate of Signed value. This instruction adds the signed integer values of the vector elements in the source SIMD and FP register to corresponding unsigned integer values of the vector elements in the destination SIMD and FP register, and accumulates the resulting unsigned integer values with the vector elements of the destination SIMD and FP register.

If overflow occurs with any of the results, those results are saturated. If saturation occurs, the cumulative saturation bit FPSR.QC is set.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

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