You copied the Doc URL to your clipboard.
LDAEX
Load-Acquire Register Exclusive.
Note
This instruction is supported only in ARMv8.Syntax
LDAEX{
} cond
, [Rt
]
Rn
LDAEXB{
} cond
, [Rt
]
Rn
LDAEXH{
} cond
, [Rt
]
Rn
LDAEXD{
} cond
, Rt
, [Rt2
]
Rn
where:
cond
- is an optional condition code.
Rt
- is the register to load.
Rt2
- is the second register for doubleword loads.
Rn
- is the register on which the memory address is based.
Operation
LDAEX
loads data from memory.
- If the physical address has the Shared
TLB attribute,
LDAEX
tags the physical address as exclusive access for the current processor, and clears any exclusive access tag for this processor for any other physical address. - Otherwise, it tags the fact that the executing processor has an outstanding tagged physical address.
- If any loads or stores appear after
LDAEX
in program order, then all observers are guaranteed to observe theLDAEX
before observing the loads and stores. Loads and stores appearing beforeLDAEX
are unaffected.
Restrictions
The PC must not be used for any of
, Rt
, or Rt2
.Rn
For A32 instructions:
- SP can be used but use of SP for any of
, orRt
is deprecated.Rt2
- For
LDAEXD
,
must be an even numbered register, and not LR.Rt
must beRt2
.R(t+1)
For T32 instructions:
- SP can be used for
R
, but must not be used for any ofn
, orRt
.Rt2
- For
LDAEXD
,
andRt
must not be the same register.Rt2
Usage
Use LDAEX
and STLEX
to
implement interprocess communication in multiple-processor and shared-memory
systems.
For reasons of performance, keep the number of instructions
between corresponding LDAEX
and STLEX
instructions
to a minimum.
Note
The address used in aSTLEX
instruction
must be the same as the address in the most recently executed LDAEX
instruction.
Availability
These 32-bit instructions are available in A32 and T32.
There are no 16-bit versions of these instructions.