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TEQ

Test Equivalence.

Syntax

TEQ{cond} Rn, Operand2

where:

cond

is an optional condition code.

Rn

is the ARM register holding the first operand.

Operand2

is a flexible second operand.

Usage

This instruction tests the value in a register against Operand2. It updates the condition flags on the result, but does not place the result in any register.

The TEQ instruction performs a bitwise Exclusive OR operation on the value in Rn and the value of Operand2. This is the same as an EORS instruction, except that the result is discarded.

Use the TEQ instruction to test if two values are equal, without affecting the V or C flags (as CMP does).

TEQ is also useful for testing the sign of a value. After the comparison, the N flag is the logical Exclusive OR of the sign bits of the two operands.

Register restrictions

In this T32 instruction, you cannot use SP or PC for Rn or Operand2.

In this A32 instruction, use of SP or PC is deprecated.

For A32 instructions:

  • If you use PC (R15) as Rn, the value used is the address of the instruction plus 8.
  • You cannot use PC for any operand in any data processing instruction that has a register-controlled shift.

Condition flags

This instruction:

  • Updates the N and Z flags according to the result.
  • Can update the C flag during the calculation of Operand2.
  • Does not affect the V flag.

Architectures

This instruction is available in A32 and T32.

Correct example

    TEQEQ   r10, r9

Incorrect example

    TEQ     pc, r1, ROR r0      ; PC not permitted with register
                                ; controlled shift
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