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UDF

Permanently Undefined.

Syntax

UDF{c}{q} {#}imm ; A1 general registers (A32)

UDF{c}{q} {#}imm ; T1 general registers (T32)

UDF{c}.W {#}imm ; T2 general registers (T32)

Where:

imm

The value depends on the instruction variant:

general registers
For A32, a 16-bit unsigned immediate, in the range 0 to 65535.
T1 general registers
For T32, an 8-bit unsigned immediate, in the range 0 to 255.
T2 general registers
For T32, a 16-bit unsigned immediate, in the range 0 to 65535.

Note

The PE ignores the value of this constant.
c
Is an optional condition code. See Chapter 7 Condition Codes. ARM deprecates using any c value other than AL.
q
Is an optional instruction width specifier. See Instruction width specifiers.

Usage

Permanently Undefined generates an Undefined Instruction exception.

The encodings for UDF used in this section are defined as permanently undefined in the ARMv8-A architecture. However:

  • With the T32 instruction set, ARM deprecates using the UDF instruction in an IT block.
  • In the A32 instruction set, UDF is not conditional.
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