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STCLR, STCLRL, STCLRL

Atomic bit clear on word or doubleword in memory, without return.

Syntax

STCLR Ws, [Xn|SP] ; 32-bit, no memory ordering

STCLRL Ws, [Xn|SP] ; 32-bit, release

STCLR Xs, [Xn|SP] ; 64-bit, no memory ordering

STCLRL Xs, [Xn|SP] ; 64-bit, release

Where:

Ws
Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location.
Xn|SP
Is the 64-bit name of the general-purpose base register or stack pointer.
Xs
Is the 64-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location.

Architectures supported

Supported in ARMv8.1 and later.

Usage

Atomic bit clear on word or doubleword in memory, without return, atomically loads a 32-bit word or 64-bit doubleword from memory, performs a bitwise AND with the complement of the value held in a register on it, and stores the result back to memory.

  • STCLR has no memory ordering semantics.
  • STCLRL stores to memory with release semantics, as described in Load-Acquire, Store-Release.

For information about memory accesses see Load/Store addressing modes in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.