Signed saturating extract Narrow.
- Is the destination width specifier, and can be one of the values shown in Usage.
- Is the number of the SIMD and FP destination register.
- Is the source width specifier, and can be one of the values shown in Usage.
- Is the number of the SIMD and FP source register.
Signed saturating extract Narrow. This instruction reads each vector element from the source SIMD and FP register, saturates the value to half the original width, places the result into a vector, and writes the vector to the lower or upper half of the destination SIMD and FP register. The destination vector elements are half as long as the source vector elements. All the values in this instruction are signed integer values.
If overflow occurs with any of the results, those results are saturated. If saturation occurs, the cumulative saturation bit FPSR.QC is set.
SQXTN instruction writes the vector to the lower half of the destination register and clears the upper half, while the
SQXTN2 instruction writes the vector to the upper half of the destination register without affecting the other bits of the register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
The following table shows the valid specifier combinations:
Table 19-28 SQXTN (Scalar) specifier combinations