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FMOV (vector, immediate)
Floating-point move immediate (vector).
Syntax
FMOV
Vd
.T
, #imm
; Half-precision
FMOV
Vd
.T
, #imm
; Single-precision
FMOV
Vd
.2D, #imm
; Double-precision
Where:
Vd
-
The value depends on the instruction variant:
- Half-precision
- Is the name of the SIMD and FP destination register
- Single-precision
- Is the name of the SIMD and FP destination register
- Double-precision
- Is the name of the SIMD and FP destination register
T
-
For the half-precision variant: is an arrangement specifier:
- Half-precision
-
Can be one of
4H
or8H
. - Single-precision
-
Can be one of
2S
or4S
.
imm
-
The value depends on the instruction variant:
- Half-precision
- Is a signed floating-point constant with 3-bit exponent and normalized 4 bits of precision. For details of the range of constants available and the encoding of
, see Modified immediate constants in A64 floating-point instructions in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.imm
- Single-precision
- Is a signed floating-point constant with 3-bit exponent and normalized 4 bits of precision. For details of the range of constants available and the encoding of
, see Modified immediate constants in A64 floating-point instructions in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.imm
- Double-precision
- Is a signed floating-point constant with 3-bit exponent and normalized 4 bits of precision. For details of the range of constants available and the encoding of
, see Modified immediate constants in A64 floating-point instructions in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.imm
Architectures supported (vector)
Supported in ARMv8.2 and later.
Usage
Floating-point move immediate (vector). This instruction copies an immediate floating-point constant into every element of the SIMD and FP destination register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.